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for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. for small orders, phone 408-737-7600 ext. 3468. max5152/max5153 low-power, dual, 13-bit voltage-output dacs with configurable outputs ________________________________________________________________ maxim integrated products 1 19-1304; rev 0; 10/97 _______________general description the max5152/max5153 low-power, serial, voltage-out- put, dual 13-bit digital-to-analog converters (dacs) consume only 500? from a single +5v (max5152) or +3v (max5153) supply. these devices feature rail-to- rail output swing and are available in space-saving 16-pin qsop and dip packages. access to the invert- ing input allows for specific gain configurations, remote sensing, and high output current capability, making these devices ideally suited for industrial process con- trols. these devices are also well suited for digitally programmable (4?0ma) current loops. the 3-wire serial interface is spi/qspi and microwire compatible. each dac has a double- buffered input organized as an input register followed by a dac register, which allows the input and dac reg- isters to be updated independently or simultaneously. additional features include a programmable shutdown (2?), hardware-shutdown lockout, a separate voltage reference for each dac, power-on reset, and an active- low clear input ( cl ) that resets all registers and dacs to zero. the max5152/max5153 provide a programma- ble logic output pin for added functionality, and a seri- al-data output pin for daisy chaining. ________________________applications industrial process control motion control digital offset and gain digitally programmable adjustment 4?0ma current loops remote industrial controls automatic test equipment ____________________________features ? 13-bit dual dac with configurable output amplifier ? single-supply operation: +5v (max5152) +3v (max5153) ? rail-to-rail output swing ? low quiescent current: 500? (normal operation) 2? (shutdown mode) ? power-on reset clears dac outputs to zero ? spi/qspi and microwire compatible ? space-saving 16-pin qsop package ? pin-compatible 12-bit versions: max5156/max5157 ______________ordering information rail-to-rail is a registered trademark of nippon motorola ltd. spi and qspi are trademarks of motorola, inc. microwire is a trademark of national semiconductor corp. ordering information continued at end of data sheet. * dice are tested at t a = +25?, dc parameters only. dice* 0? to +70? ? max5152bc/d 16 qsop 0? to +70? ? max5152bcee 16 qsop 0? to +70? ?/2 max5152acee 16 plastic dip 0? to +70? ? max5152bcpe 16 plastic dip 0? to +70? ?/2 max5152 acpe pin-package temp. range inl (lsb) part refa cl dout 16-bit shift register sr control input reg a sclk upo refb din cs dac a dac b fba fbb outa outb dac reg a input reg b logic output decode control dac reg b max5152 max5153 v dd agnd dgnd pdl _________________________________________________________functional diagram pin configuration appears at end of data sheet.
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics?ax5152 (v dd = +5v 10%, v refa = v refb = 2.5v, r l = 10k , c l = 100pf, t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c, output buffer connected in unity-gain configuration (figure 9).) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to agnd ............................................................ -0.3v to +6v v dd to dgnd ........................................................... -0.3v to +6v agnd to dgnd .................................................................. 0.3v fba, fbb to agnd ..................................... -0.3v to (v dd + 0.3v) ref_, out_ to agnd ................................. -0.3v to (v dd + 0.3v) digital inputs (sclk, din, cs , cl , pdl ) to dgnd ................................................................ -0.3v to +6v digital outputs (dout, upo) to dgnd ..... -0.3v to (v dd + 0.3v) maximum current into any pin ......................................... 20ma continuous power dissipation (t a = +70 c) plastic dip (derate 10.5mw/ c above +70 c) ............. 593mw qsop (derate 8.30mw/ c above +70 c) ..................... 667mw cerdip (derate 10.00mw/ c above +70 c) ................ 800mw operating temperature ranges max5152_c_e/max5153_c_e ........................... 0 c to +70 c max5152_e_e/max5153_e_e .......................... -40 c to +85 c max5152_mje/max5153_mje ...................... -55 c to +125 c storage temperature range ............................. -65 c to +150 c lead temperature (soldering, 10sec) ............................. +300 c v in = 0v to v dd cl , pdl , cs , din, sclk cl , pdl , cs , din, sclk input code = 1fff hex, v ref = 1vp-p at 2.5v dc , f = 25khz input code = 0000 hex, v ref = (v dd - 1.4vp-p) at 1khz 4.5v v dd 5.5v input code = 1fff hex, v ref = 0.67vp-p at 2.5v dc normalized to 2.5v (note 1) guaranteed monotonic code = 20 minimum with code 1555 hex normalized to 2.5v conditions pf 8 c in input capacitance a 0.001 1 i in input leakage current mv 200 v hys input hysteresis v 0.8 v il input low voltage v 3.0 v ih input high voltage db 82 sinad signal-to-noise plus distortion ratio db -85 reference feedthrough khz 600 reference 3db bandwidth k 14 20 r ref reference input resistance v 0 v dd - 1.4 ref reference input range 1/2 bits 13 n resolution v/v 20 200 psrr v dd power-supply rejection ratio ppm/ c 3 gain-error tempco lsb -0.5 6 gain error lsb 1 inl integral nonlinearity lsb 1 dnl differential nonlinearity mv 6 v os offset error ppm/ c 3 tcv os offset tempco units min typ max symbol parameter max5152a max5152b static performance reference input multiplying-mode performance digital inputs
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs _______________________________________________________________________________________ 3 electrical characteristics?ax5152 (continued) (v dd = +5v 10%, v refa = v refb = 2.5v, r l = 10k , c l = 100pf, t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c, output buffer connected in unity-gain configuration (figure 9).) note 1: accuracy is specified from code 20 to code 8191. note 2: accuracy is better than 1lsb for v out greater than 6mv and less than v dd - 50mv. guaranteed by psrr test at the end points. note 3: digital inputs are set to either v dd or dgnd, code = 0000 hex, r l = . note 4: sclk minimum clock period includes rise and fall times. cs = v dd , f din = 100khz, v sclk = 5vp-p i source = 2ma rail-to-rail (note 2) to 1/2lsb of full-scale, v step = 2.5v i sink = 2ma conditions nv-s 5 digital crosstalk nv-s 5 digital feedthrough s 25 time required to exit shutdown a 0 0.1 i fb _ current into fba or fbb v v dd - 0.5 v oh output high voltage v 0 to v dd output voltage swing s 20 output settling time v 0.13 0.40 v ol output low voltage v/ s 0.75 sr voltage output slew rate units min typ max symbol parameter (note 4) (note 3) (note 3) ns 40 t cl sclk pulse width low ns 40 t ch sclk pulse width high ns 100 t cp sclk clock period a 1 reference current in shutdown a 2 10 i dd(shdn) power-supply current in shutdown ma 0.5 0.65 i dd power-supply current v 4.5 5.5 v dd positive supply voltage ns 40 t ds din setup time ns 0 t chs sclk rise to cs rise hold time ns 40 t css cs fall to sclk rise setup time c load = 200pf c load = 200pf ns 80 t do2 sclk fall to dout valid propagation delay ns 80 t do1 sclk rise to dout valid propagation delay ns 0 t dh din hold time ns 100 t csw cs pulse width high ns 40 t cs1 cs rise to sclk rise hold ns 10 t cs0 sclk rise to cs fall delay digital outputs (dout, upo) dynamic performance power supplies timing characteristics
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs 4 _______________________________________________________________________________________ electrical characteristics?ax5153 (v dd = +2.7v to +3.6v, v refa = v refb = 1.25v, r l = 10k , c l = 100pf, t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c, output buffer connected in unity-gain configuration (figure 9).) v in = 0v to v dd cl , pdl , cs , din, sclk cl , pdl , cs , din, sclk input code = 1fff hex, v ref = 1vp-p at 1.25v dc , f = 15khz input code = 0000 hex, v ref = (v dd - 1.4v) at 1khz 2.7v v dd 3.6v input code = 1fff hex, v ref(ac) = 0.67vp-p at 1.25v dc normalized to 1.25v (note 5) guaranteed monotonic code = 40 minimum with code 1555 hex normalized to 1.25v conditions pf 8 c in input capacitance a 0 0.1 i in input leakage current mv 200 v hys input hysteresis v 0.8 v il input low voltage v 2.2 v ih input high voltage db 73 sinad signal-to-noise plus distortion ratio db -92 reference feedthrough khz 600 reference 3db bandwidth k 14 r ref reference input resistance v 0 v dd - 1.4 ref reference input range 1 bits 13 n resolution v/v 20 320 psrr v dd power-supply rejection ratio ppm/ c 6 gain-error tempco lsb -0.5 8 gain error lsb 2 inl integral nonlinearity lsb 1 dnl differential nonlinearity mv 6 v os offset error ppm/ c 6 tcv os offset tempco units min typ max symbol parameter max5153a max5153b i sink = 2ma i source = 2ma v 0.13 0.4 v ol output low voltage v v dd - 0.5 v oh output high voltage static performance reference input (v ref ) multiplying-mode performance digital inputs digital outputs (dout, upo)
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs _______________________________________________________________________________________ 5 electrical characteristics?ax5153 (continued) (v dd = +2.7v to +3.6v, v refa = v refb = 1.25v, r l = 10k , c l = 100pf, t a = t min to t max , unless otherwise noted. typical values are at t a = +25 c, output buffer connected in unity-gain configuration (figure 9).) cs = v dd , f din = 100khz, v sclk = 3vp-p (note 4) (note 7) (note 7) ns rail-to-rail (note 6) to 1/2lsb of full-scale, v step = 1.25v 40 t cl sclk pulse width low conditions ns 40 t ch sclk pulse width high nv-s 5 digital crosstalk nv-s 5 digital feedthrough s 25 time required to exit shutdown a 0 0.1 i fb_ current into fba or fbb ns 100 t cp sclk clock period a 1 reference current in shutdown a 1 8 i dd(shdn) power-supply current in shutdown ma 0.5 0.6 i dd power-supply current v 2.7 3.6 v dd positive supply voltage ns 50 t ds din setup time ns 0 t chs sclk rise to cs rise hold time ns 40 t css cs fall to sclk rise setup time c load = 200pf v 0 to v dd output voltage swing s 25 output settling time c load = 200pf ns 120 v/ s 0.75 sr voltage output slew rate units min typ max symbol parameter t do2 sclk fall to dout valid propagation delay ns 120 t do1 sclk rise to dout valid propagation delay ns 0 t dh din hold time ns 100 t csw cs pulse width high ns 40 t cs1 cs rise to sclk rise hold ns 10 t cs0 sclk rise to cs fall delay note 4: sclk minimum clock period includes rise and fall times. note 5: accuracy is specified from code 40 to code 8191. note 6: accuracy is better than 1lsb for v out greater than 6mv and less than v dd - 100mv. guaranteed by psrr test at the end points. note 7: digital inputs are set to either v dd or dgnd, code = 0000 hex, r l = . dynamic performance power supplies timing characteristics
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs 6 _______________________________________________________________________________________ __________________________________________ t ypical operating characteristics (v dd = +5v, r l = 10k , c l = 100pf, fb_ tied to out_, t a = +25 c, unless otherwise noted.) -20 -16 -18 -12 -14 -8 -10 -6 -2 -4 0 0 600 1200 1800 2400 3000 reference voltage input frequency response max5152 toc01 frequency (khz) relative output (db) v ref = 0.67vp-p at 2.5v dc code = 1fff (hex) 0.40 0.50 0.45 0.55 0.60 -60 20 60 -20 100 140 supply current vs. temperature max5152 toc02 temperature (?) supply current (ma) code = 1fff (hex) code = 0000 (hex) r l = -30 -90 0 10 100 total harmonic distortion plus noise vs. frequency -70 -50 -60 -80 -40 max5152 toc03 frequency (khz) thd + noise (db) v ref = 1vp-p at 2.5v dc code = 1fff (hex) 0 -1.0 0.1 1 10 100 1000 full-scale error vs. load -0.8 max5152 toc04 load (k w ) full-scale error (lsb) -0.6 -0.4 -0.2 v ref = 2.5v -100 -80 -90 -60 -70 -40 -50 -30 -10 -20 0 0.5 1.5 2.0 2.5 1.0 3.0 3.5 4.0 5.0 4.5 5.5 output fft plot max5152-toc07 frequency (khz) relative output (db) v ref = 3.6vp-p at 1.8v dc f = 1khz code = 1fff (hex) note: relative to full scale -150 -130 -140 -110 -120 -90 -100 -80 -60 -70 -50 0.5 1.5 2.0 2.5 1.0 3.0 3.5 4.0 5.0 4.5 5.5 reference feedthrough at 1khz max5152-toc05 frequency (khz) relative output (db) v ref = 3.6vp-p at 1.88v dc code = 0000 (hex) 0 1.5 1.0 0.5 2.0 2.5 3.0 -55 25 5 -35 -15 45 65 85 105 125 power-down current vs. temperature max5152 toc06 temperature (?) power-down current ( m a) cs 5v/div ac coupled out_ 500mv/div dynamic-response rise time max5152 toc08 2 m s/div cs 5v/div ac coupled out_ 500mv/div dynamic-response fall time max5152 toc09 2 m s/div max5152
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs _______________________________________________________________________________________ 7 -20 -16 -18 -12 -14 -8 -10 -6 -2 -4 0 0 500 1000 1500 2000 2500 reference voltage input frequency response max5152 toc10 frequency (khz) relative output (db) v ref = 0.67vp-p at 1.25v dc code = 1fff (hex) 0.40 0.50 0.45 0.55 0.60 -60 20 60 -20 100 140 supply current vs. temperature max5152 toc11 temperature (?) supply current (ma) code = 1fff (hex) code = 0000 (hex) r l = -30 -90 0 10 100 total harmonic distortion plus noise vs. frequency -70 -50 -60 -80 -40 max5152 toc12 frequency (khz) thd + noise (db) v ref = 1vp-p at 1v dc code = 1fff (hex) 0 -1.2 0.1 1 10 100 1000 full-scale error vs. load -0.8 max5152 toc13 load (k w ) full-scale error (lsb) -1.0 -0.6 -0.4 -0.2 v ref = 1.25v -100 -80 -90 -60 -70 -40 -50 -30 -10 -20 0 0.5 1.5 2.0 2.5 1.0 3.0 3.5 4.0 5.0 4.5 5.5 output fft plot max5152-toc16 frequency (khz) relative output (db) v ref = 1.6vp-p at 0.88v dc f = 1khz code = 1fff (hex) note: relative to full scale -150 -130 -140 -110 -120 -90 -100 -80 -60 -70 -50 0.5 1.5 2.0 2.5 1.0 3.0 3.5 4.0 5.0 4.5 5.5 reference feedthrough at 1khz max5152-toc14 frequency (khz) relative output (db) v ref = 1.6vp-p at 0.88v dc code = 0000 (hex) 0 1.5 1.0 0.5 2.0 2.5 3.0 -55 25 5 -35 -15 45 65 85 105 125 power-down current vs. temperature max5251 toc15 temperature (?) power-down current ( m a) out_ 500mv/div dynamic-response rise time max5152 toc17 2 m s/div cs 2v/div out_ 500mv/div dynamic-response fall time max5152 toc18 2 m s/div cs 2v/div ____________________________ t ypical operating characteristics (continued) (v dd = +3v, r l = 10k , c l = 100pf, fb_ tied to out_, t a = +25 c, unless otherwise noted.) max5153
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs 8 _______________________________________________________________________________________ ____________________________ t ypical operating characteristics (continued) (v dd = +5v (max5152), v dd = +3v (max5153), r l = 10k , c l = 100pf, fb_ tied to out_, t a = t min to t max , unless otherwise noted.) outa 1v/div outb 200 m v/div ac coupled max5152 analog crosstalk max5152 toc21 200 m s/div sclk 5v/div outa 500 m v/div ac coupled max5152 digital feedthrough max5152 toc22 1 m s/div max5152/max5153 0.30 0.40 0.35 0.50 0.55 0.45 0.60 4.50 4.75 5.00 5.25 5.50 max5152 supply current vs. supply voltage max5152 toc19 supply voltage (v) supply current (ma) code = 1fff (hex) code = 0000 (hex) r l = 0.30 0.40 0.35 0.50 0.45 0.55 2.7 3.0 3.3 3.6 max5153 supply current vs. supply voltage max5152 toc19a supply voltage (v) supply current (ma) code = 1fff (hex) code = 0000 (hex) r l = cs 2v/div out_ 10mv/div ac coupled max5152 major-carry transition max5152 toc20 2 m s/div
_______________ detailed description the max5152/max5153 dual, 13-bit, voltage-output dacs are easily configured with a 3-wire serial inter - face. these devices include a 16-bit data-in/data-out shift register, and each dac has a double-buffered input comprised of an input register and a dac register (see functional diagram ). both dacs use an inverted r-2r ladder network that produces a weighted voltage proportional to the input voltage value. each dac has its own reference input to facilitate independent full- scale values. figure 1 depicts a simplified circuit dia - gram of one of the two dacs. reference inputs the reference inputs accept both ac and dc values with a voltage range extending from 0v to (v dd - 1.4v). determine the output voltage using the following equa - tion: v out = v ref x nb / 8192 where nb is the numeric value of the dac? binary input code (0 to 8191) and v ref is the reference voltage. t he reference input impedance ranges from 14k (1555 hex) to several giga ohms (with an input code of 0000 hex). this reference input capacitance is code depen - dent and typically ranges from 15pf with an input code of all zeros to 50pf with an input code of all ones. output amplifier the output amplifier? inverting input is available to the user, allowing force and sense capability for remote sensing and specific gain configurations. the inverting input can be connected to the output to provide a unity- gain buffered output. the output amplifiers have a typi - cal slew rate of 0.75v/ s and settle to 1/2lsb within 25 s, with a load of 10k in parallel to 100pf. loads less than 2k degrade performance. max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs _______________________________________________________________________________________ 9 ______________________________________________________________ pin description pin analog ground agnd 1 function name dac a output voltage outa 2 reference for dac a refa 4 dac a output amplifier feedback input. inverting input of the output amplifier. fba 3 chip-select input cs 6 serial clock input sclk 8 serial data input din 7 active-low clear input. resets all registers to zero. dac outputs go to 0v. cl 5 serial data output dout 10 power-down lockout. the device cannot be powered down when pdl is low. pdl 12 user-programmable output upo 11 dac b output amplifier feedback input. inverting input of the output amplifier. fbb 14 positive power supply v dd 16 dac b output voltage outb 15 reference input for dac b refb 13 digital ground dgnd 9 out_ fb_ shown for all 1s on dac d0 d10 d11 d12 2r 2r 2r 2r 2r r r r ref_ agnd figure 1. simplified dac circuit diagram
max5152/max5153 power-down mode the max5152/max5153 feature a software-program - mable shutdown mode that reduces the typical supply current to 2 a. the two dacs can be shut down inde - pendently or simultaneously by using the appropriate programming word. for instance, enter shutdown mode (for both dacs) by writing an input control word of 111xxxxxxxxxxxxx (table 1). in shutdown mode, the reference inputs and amplifier outputs become high impedance, and the serial interface remains active. data in the input registers is saved, allowing the max5152/max5153 to recall the output state prior to entering shutdown when returning to normal mode. exit shutdown by recalling the previous condition or by updating the dac with new information. when returning to normal operation (exiting shutdown), wait 20 s for output stabilization. serial interface the max5152/max5153 3-wire serial interface is com - patible with both microwire (figure 2) and spi/qspi (figure 3) serial-interface standards. the 16-bit serial input word consists of an address bit, two control bits, and 13 bits of data (msb to lsb) as shown in figure 4. the address and control bits determines the response of the max5152/max5153, as outlined in table 1. the max5152/max5153? digital inputs are double buffered, which allows any of the following: loading the input register(s) without updating the dac register(s), updating the dac register(s) from the input register(s), or updating the input and dac registers concurrently. the address and control bits allow for the dacs to act independently. low-power , dual, 13-bit v oltage-output dacs with configurable outputs 10 ______________________________________________________________________________________ d12................d0 msb lsb 16-bit serial word function a0 c1 c0 0 0 1 13 bits of dac data load input register a; dac register is unchanged. 0 1 1 13 bits of dac data load all dac registers from the shift register (start up both dacs with new data). 1 1 0 13 bits of dac data load input register b; all dac registers are updated. 0 1 0 13 bits of dac data load input register a; all dac registers are updated. 1 0 1 13 bits of dac data load input register b; dac register is unchanged. 0 0 0 1 1 0 x xxxxxxxxx shut down dac a when pdl = 1. 0 0 0 1 0 1 x xxxxxxxxx update dac register b from input register b (start up dac b with data previ - ously stored in input register b). 0 0 0 0 0 1 x xxxxxxxxx update dac register a from input register a (start up dac a with data previ - ously stored in input register a). 1 1 1 xxxxxxxxxxxxx shut down both dacs if pdl = 1. 1 0 0 xxxxxxxxxxxxx update both dac registers from their respective input registers (start up both dacs with data previously stored in the input registers). 0 0 0 1 1 1 x xxxxxxxxx shut down dac b when pdl = 1. 0 0 0 0 1 0 x xxxxxxxxx upo goes low (default). 0 0 0 0 1 1 x xxxxxxxxx upo goes high. 0 0 0 1 0 0 1 xxxxxxxxx mode 1, dout clocked out on sclk? rising edge. 0 0 0 1 0 0 0 xxxxxxxxx mode 0, dout clocked out on sclk? falling edge (default). 0 0 0 0 0 0 x xxxxxxxxx no operation (nop). table 1. serial-interface programming commands ??= don? care note: when a0, c1, and c0 = ?? d12, d11, d10, and d9 become control bits.
send the 16-bit data as two 8-bit packets (spi, microwire) or one 16-bit word (qspi), with cs low dur - ing this period. the address and control bits determine which register will be updated, as well as the state of the registers when exiting shutdown. the 3-bit address/control determines: registers to be updated clock edge on which data is clocked out via the seri - al data output (dout) state of the user-programmable logic output configuration of the device after shutdown the general timing diagram in figure 5 illustrates how data is acquired. driving cs low enables the device to receive data. otherwise, the interface control circuitry is disabled. with cs low, data at din is clocked into the register on the rising edge of sclk. as cs goes high, data is latched into the input and/or dac registers depending on the address and control bits. the maxi - mum clock frequency guaranteed for proper operation is 10mhz. figure 6 depicts a more detailed timing dia - gram of the serial interface. serial data output (dout) dout is the internal shift register? output. it allows for daisy-chaining and data readback. the max5152/ max5153 can be programmed to shift data out of dout on sclk? falling edge (mode 0) or rising edge (mode 1). mode 0 provides a lag of 16 clock cycles, which maintains compatibility with spi/qspi and microwire interfaces. in mode 1, the output data lags 15.5 clock cycles. on power-up, the device defaults to mode 0. user-programmable logic output (upo) upo allows an external device to be controlled through the max5152/max5153 serial interface (table 1), there - by reducing the number of microcontroller i/o pins required. on power-up, upo is low. power-down lockout input ( pdl ) pdl disables software shutdown when low. when in shutdown, transitioning pdl from high to low wakes up the part with the output set to the state prior to shut - down. pdl can also be used to asynchronously wake up the device. daisy chaining devices any number of max5152/max5153s can be daisy chained by connecting the dout pin of one device to the din pin of the following device in the chain (figure 7). max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs ______________________________________________________________________________________ 11 sclk din cs sk so i/o max5152 max5153 microwire port figure 2. connections for microwire din sclk cs mosi sck i/o spi/qspi port ss v cc cpol = 0, cpha = 0 max5152 max5153 figure 3. connections for spi/qspi figure 4. serial-data format 1 address/2 control bits a0 msb .................................................................................. lsb address bits c1, c0 control bits 16 bits of serial data 13 data bits d12.................................d0 msb.......data bits.........lsb
max5152/max5153 since the max5152/max5153? dout has an internal active pull-up, the dout sink/source capability deter - mines the time required to discharge/charge a capaci - tive load. refer to the digital output v oh and v ol specifications in the electrical characteristics . figure 8 shows an alternative method of connecting several max5152/max5153s. in this configuration, the data bus is common to all devices; data is not shifted through a daisy-chain. more i/o lines are required in this configuration because a dedicated chip-select input ( cs ) is required for each ic. low-power , dual, 13-bit v oltage-output dacs with configurable outputs 12 ______________________________________________________________________________________ cs sclk din command executed 9 8 1 6 1 c1 a0 d0 c0 d12 d11 d10 d9 d6 d5 d4 d3 d2 d1 d8 d7 figure 5. serial-interface timing diagram sclk din t cso t css t cl t ch t cp t csw t cs1 t csh t ds t dh cs figure 6. detailed serial-interface timing diagram to other serial devices max5152 max5153 din sclk cs max5152 max5153 max5152 max5153 din dout dout dout sclk cs din sclk cs figure 7. daisy chaining max5152/max5153s
__________ applications infor mation unipolar output figure 9 depicts the max5152/max5153 configured for unity-gain, unipolar operation. table 2 lists the unipolar output codes. to increase dynamic range, specific gain configurations can be used as shown in figure 10. bipolar output the max5152/max5153 can be configured for a bipo - lar output, as shown in figure 11. the output voltage is given by the equation: v out = v ref [((2 x nb) / 8192) - 1] where nb represents the numeric value of the dac? binary input code. table 3 shows digital codes and the corresponding output voltage for figure 11? circuit. max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs ______________________________________________________________________________________ 13 to other serial devices max5152 max5153 din sclk cs max5152 max5153 din sclk cs max5152 max5153 din sclk cs din sclk cs1 cs2 cs3 figure 8. multiple max5152/max5153s sharing a common din line max5152 max5153 dac ref_ out_ fb_ dgnd agnd +5v/+3v v dd figure 9. unipolar output circuit table 2. unipolar code table (gain = +1) 00000 0000 0001 0v 00000 0000 0000 01111 1111 1111 10000 0000 0000 dac contents msb lsb 10000 0000 0001 11111 1111 1111 analog output +v 8191 8192 ref ? ? ? ? +v 4097 8192 ref ? ? ? ? +v 4095 8192 ref ? ? ? ? +v 1 8192 ref ? ? ? ? +v 4096 8192 v 2 ref ref ? ? ? ? =
max5152/max5153 using an ac reference in applications where the reference has an ac signal component, the max5152/max5153 have multiplying capabilities within the reference input voltage range specifications. figure 12 shows a technique for apply - ing a sinusoidal input to the reference input to ref_, where the ac signal is offset before being applied to the reference input. harmonic distortion and noise the total harmonic distortion plus noise (thd+n) is typ - ically less than -80db at full scale with a 1vp-p input swing at 5khz. the typical -3db frequency is 600khz for both devices, as shown in the typical operating characteristics . low-power , dual, 13-bit v oltage-output dacs with configurable outputs 14 ______________________________________________________________________________________ max5152 max5153 dac v out = ( 1 + r1 ) ( n )( v ref_ ) r2 8192 ref_ v out fb_ out_ agnd dgnd +5v/+3v v dd r2 r1 figure 10. configurable output gain agnd dgnd max5152 max5153 dac _ ref_ out_ fb_ 10k 10k v- v+ v dd v out +5v/+3v figure 11. bipolar output circuit dac_ out_ fb_ max5152 max5153 10k 26k ref_ v dd dgnd agnd +5v/ +3v ac reference input 500mvp-p max495 +5v/+3v figure 12. ac reference input circuit table 3. bipolar code table 00000 0000 0001 00000 0000 0000 01111 1111 1111 0v 10000 0000 0000 dac contents msb lsb 10000 0000 0001 11111 1111 1111 analog output +v 4095 4096 ref ? ? ? ? +v 1 4096 ref ? ? ? ? -v 1 4096 ref ? ? ? ? -v 4095 4096 ref ? ? ? ? -v 4096 4096 - v ref ref ? ? ? ? =
digital calibration and threshold selection figure 13 shows the max5152/max5153 in a digital calibration application. with a bright value applied to the photodiode (on), the dac is digitally ramped up until it trips the comparator. the microprocessor stores this high calibration value. repeat the process with a dim light (off) to obtain the dark current calibration. the microprocessor then programs the dac to set an out - put voltage that is the midpoint of the two calibration values. applications include tachometers, motion sens - ing, automatic readers, and liquid clarity analysis. digital control of gain and offset the two dacs can be used to control the offset and gain for curve-fitting nonlinear functions, such as trans - ducer linearization or analog compression/expansion applications. the input signal is used as the reference for the gain-adjust dac, whose output is summed with the output from the offset-adjust dac. the relative weight of each dac output is adjusted by r1, r2, r3, and r4 (figure 14). max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs ______________________________________________________________________________________ 15 agnd din m p dgnd max5152 max5153 dac _ ref_ out_ r fb_ v+ v- photodiode v+ v dd v out +5v/+3v figure 13. digital calibration agnd dgnd refa control/ shift register refb max5152 max5153 daca +5v/+3v v dd v in cs din sclk cl v ref r1 r3 r4 r2 out_b fbb fba out_a v out dacb ? offset [ ] v out = = gain [ ] na 8192 na is the numeric value of the input code for daca. nb is the numeric value of the input code for dacb. r2 r1+r2 r4 r3 nb 8192 r4 r3 ( v in )( )( 1+ ) ( v ref )( ) [ ] [ ] figure 14. digital control of gain and offset
max5152/max5153 digital programmable current source figure 15 depicts a digitally programmable, unidirec - tional current source that can be used in industrial con - trol applications. the output current is: i out = (v ref / r) (nb / 8192) where nb is the dac code and r is the sense resistor. power-supply considerations on power-up, the input and dac registers clear (reset to zero code). for rated performance, v ref_ should be at least 1.4v below v dd . bypass the power supply with a 4.7 f capacitor in parallel with a 0.1 f capacitor to gnd. minimize lead lengths to reduce lead inductance. grounding and layout considerations digital and ac transient signals on agnd can create noise at the output. connect agnd to the highest quali - ty ground available. use proper grounding techniques, such as a multilayer board with an unbroken, low- inductance ground plane. carefully lay out the traces between channels to reduce ac cross-coupling and crosstalk. wire-wrapped boards and sockets are not recommended. if noise becomes an issue, shielding may be required. low-power , dual, 13-bit v oltage-output dacs with configurable outputs 16 ______________________________________________________________________________________ max5152 max5153 dac_ ref_ 2n3904 r v l i out agnd fb_ out_ +5v/+3v v dd dgnd figure 15. digitally programmable current source
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs ______________________________________________________________________________________ 17 ___________________ chip infor mation transistor count: 3053 substrate connected to agnd __________________ pin configuration _ or dering infor mation (continued) 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 agnd v dd outb fbb refb pdl upo dout dgnd top view max5152 max5153 dip/qsop outa fba cs refa cl din sclk 2 16 cerdip** -55 c to +125 c max5153bmje 2 16 qsop -40 c to +85 c max5153beee 1 16 qsop -40 c to +85 c max5153aeee 2 16 plastic dip -40 c to +85 c max5153bepe 16 plastic dip -40 c to +85 c 1 max5153aepe 16 cerdip** -55 c to +125 c 1 max5152bmje 16 qsop -40 c to +85 c 1 max5152beee 16 qsop -40 c to +85 c 1/2 max5152aeee pin-package temp. range inl (lsb) part 16 plastic dip -40 c to +85 c 1 max5152bepe 16 plastic dip -40 c to +85 c 1/2 max5152aepe * dice are tested at t a = +25 c, dc parameters only. ** contact factory for availability. dice* 0 c to +70 c 2 max5153bc/d 16 qsop 0 c to +70 c 2 max5153bcee 16 qsop 0 c to +70 c 1 max5153acee 16 plastic dip 0 c to +70 c 2 max5153bcpe 16 plastic dip 0 c to +70 c 1 max5153 acpe
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs 18 ______________________________________________________________________________________ ________________________________________________________ package infor mation pdipn.eps
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs ______________________________________________________________________________________ 19 ___________________________________________ package infor mation (continued) qsop.eps
max5152/max5153 low-power , dual, 13-bit v oltage-output dacs with configurable outputs maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________ maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 1997 maxim integrated products printed usa is a registered trademark of maxim integrated products. maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________ maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 1997 maxim integrated products printed usa is a registered trademark of maxim integrated products. ___________________________________________ package infor mation (continued) cdips.eps

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